An optimised field programmable gate array (FPGA) Jacobian logarithm architecture for turbo codes and soft bit demodulation

Lim, Li Li (2019) An optimised field programmable gate array (FPGA) Jacobian logarithm architecture for turbo codes and soft bit demodulation. PhD thesis, University of Nottingham.

[thumbnail of LLL_Thesis_MINORCORRECTION_NOV18.pdf]
Preview
PDF (Thesis - as examined) - Requires a PDF viewer such as GSview, Xpdf or Adobe Acrobat Reader
Available under Licence All Rights Reserved.
Download (5MB) | Preview
Item Type: Thesis (University of Nottingham only) (PhD)
Supervisors: Lim, Wee Gin
Khan, Nafizah Goriman
Keywords: field programmable gate array, Jacobian logarithm
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800 Electronics
Faculties/Schools: University of Nottingham, Malaysia > Faculty of Science and Engineering — Engineering > Department of Electrical and Electronic Engineering
Item ID: 55716
Depositing User: LIM, LI LI
Date Deposited: 27 Feb 2019 04:40
Last Modified: 28 Feb 2025 14:19
URI: https://eprints.nottingham.ac.uk/id/eprint/55716

Actions (Archive Staff Only)

Edit View Edit View