Phear, P. B. A.
(2018)
Massively-parallel and concurrent SVM architectures.
MPhil thesis, University of Nottingham.
Abstract
This work presents several Support Vector Machine (SVM) architectures developed by
the Author with the intent of exploiting the inherent parallel structures and potential-
concurrency underpinning the SVM’s mathematical operation. Two SVM training sub-
system prototypes are presented - a brute-force search classification training architecture,
and, Artificial Neural Network (ANN)-mapped optimisation architectures for both SVM
classification training and SVM regression training. This work also proposes and proto-
types a set of parallelised SVM Digital Signal Processor (DSP) pipeline architectures. The
parallelised SVM DSP pipeline architectures have been modelled in C and implemented
in VHDL for the synthesis and fitting on an Altera Stratix V FPGA. Each system pre-
sented in this work has been applied to a problem domain application appropriate to the
SVM system’s architectural limitations - including the novel application of the SVM as a
chaotic and non-linear system parameter-identification tool.
The SVM brute-force search classification training architecture has been modelled for
datasets of 2 dimensions and composed of linear and non-linear problems requiring only 4
support vectors by utilising the linear kernel and the polynomial kernel respectively. The
system has been implemented in Matlab and non-exhaustively verified using the holdout
method with a trivial linearly separable classification problem dataset and a trivial non-
linear XOR classification problem dataset. While the architecture was a feasible design for
software-based implementations targeting 2-dimensional datasets the architectural com-
plexity and unmanageable number of parallelisable operations introduced by increasing
data-dimensionality and the number of support vectors subsequently resulted in the Au-
thor pursuing different parallelised-architecture strategies.
Two distinct ANN-mapped optimisation strategies developed and proposed for SVM
classification training and SVM regression training have been modelled in Matlab; the
architectures have been designed such that any dimensionality dataset can be applied
by configuring the appropriate dimensionality and support vector parameters. Through
Monte-Carlo testing using the datasets examined in this work the gain parameters in-
herent in the architectural design of the systems were found to be difficult to tune, and,
system convergence to acceptable sets of training support vectors were unachieved. The
ANN-mapped optimisation strategies were thus deemed inappropriate for SVM training
with the applied datasets without more design effort and architectural modification work.
The parallelised SVM DSP pipeline architecture prototypes data-set dimensionality, sup-
port vector set counts, and latency ranges follow. In each case the Field Programmable
Gate Array (FPGA) pipeline prototype latency unsurprisingly outclassed the correspond-
ing C-software model execution times by at least 3 orders of magnitude. The SVM classi-
fication training DSP pipeline FPGA prototypes are compatible with data-sets spanning
2 to 8 dimensions, support vector sets of up to 16 support vectors, and have a pipeline
latency range spanning from a minimum of 0.18 microseconds to a maximum of 0.28 mi-
croseconds. The SVM classification function evaluation DSP pipeline FPGA prototypes
are compatible with data-sets spanning 2 to 8 dimensions, support vector sets of up to
32 support vectors, and have a pipeline latency range spanning from a minimum of 0.16
microseconds to a maximum of 0.24 microseconds. The SVM regression training DSP
pipeline FPGA prototypes are compatible with data-sets spanning 2 to 8 dimensions,
support vector sets of up to 16 support vectors, and have a pipeline latency range span-
ning from a minimum of 0.20 microseconds to a maximum of 0.30 microseconds. The
SVM regression function evaluation DSP pipeline FPGA prototypes are compatible with
data-sets spanning 2 to 8 dimensions, support vector sets of up to 16 support vectors,
and have a pipeline latency range spanning from a minimum of 0.20 microseconds to a
maximum of 0.30 microseconds.
Finally, utilising LIBSVM training and the parallelised SVM DSP pipeline function eval-
uation architecture prototypes, SVM classification and SVM regression was successfully
applied to Rajkumar’s oil and gas pipeline fault detection and failure system legacy data-
set yielding excellent results. Also utilising LIBSVM training, and, the parallelised SVM
DSP pipeline function evaluation architecture prototypes, both SVM classification and
SVM regression was applied to several chaotic systems as a feasibility study into the ap-
plication of the SVM machine learning paradigm for chaotic and non-linear dynamical
system parameter-identification. SVM classification was applied to the Lorenz Attrac-
tor and an ANN-based chaotic oscillator to a reasonably acceptable degree of success.
SVM classification was applied to the Mackey-Glass attractor yielding poor results. SVM
regression was applied Lorenz Attractor and an ANN-based chaotic oscillator yielding av-
erage but encouraging results. SVM regression was applied to the Mackey-Glass attractor
yielding poor results.
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