I/O port macromodelling

Kumar, Varindra (2014) I/O port macromodelling. PhD thesis, University of Nottingham.

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3D electromagnetic modelling and simulation of various Printed Circuit Board (PCB) components is an important technique for characterizing the Signal Integrity (SI) and Electromagnetic Compatibility (EMC) issues present in a PCB. However, due to limited computational resource and the complexity of the integrated circuits, it is currently not possible to fully model a complete PCB system with 3D electromagnetic solvers. An effort has been made to fully model the PCB with all its components and their S-parameters has been derived so as to integrate these S-parameters in 1D, 2D static or quasi-static field solver or circuit solver tool. The novelty of this thesis is the development and verification of active circuit such as Input and Output buffers and passive channel components such as interconnects, via and connectors and deriving their S-parameters in order to model and characterize the complete PCB using 3D full field solver based on Transmission Line Matrix modelling (TLM) method.

An integration of Input/Output (I/O) port in the 3D full field modelling method allows for modelling of the complete PCB system without being computationally expensive. This thesis presents a method for integration of Input/Output port in the 3D time domain modelling environment. Several software tools are available in the market which can characterize these PCBs in the frequency as well as the time domain using 1D, 2D techniques or using circuit solver such as spice. The work in this thesis looks at extending these 1D and 2D techniques for 3D Electromagnetic solvers in the time domain using the TLM technique for PCB analysis. The modelling technique presented in this thesis is based on in-house developed 3D TLM method along with a developed behavioral Integrated Circuit (IC) – macromodel.

The method has been applied to a wide variety of PCB topologies along with a range of IC packages to fully validate the approach. The method has also been applied to show the switching effect arising out of the crosstalk in a logic device apart from modelling various discontinuities of PCB interconnects in the form of S11 and S21 parameters.

The proposed novel TLM based technique has been selected based on simplification of its approach, electrical equivalence (rather than complex mathematical functions of Maxwell's electromagnetic theory), time domain analysis for transients in a PCB with an increased accuracy over other available methods in the literature. On the experimental side two, four and six layered PCBs with various interconnect discontinuities such as straight line, right angle, fan-out and via and IC packages such as SOT-23 (DBV), SC-70 (DCK) and SOT-553 (DRL) has been designed and manufactured. The modelling results have been verified with the experimental results of these PCBs and other commercial software such as HSPICE, CST design studio available in the market. While characterizing the SI issues, these modelling results can also help in analyzing conducted and radiated EMC/EMI problems to meet various EMC regulations such as CE, FCC around the world.

Item Type: Thesis (University of Nottingham only) (PhD)
Supervisors: Thomas, D.W.P.
Greedy, S.
Christopoulos, C.
Keywords: 3D modelling, Printed circuit board (PCB), Electromagnetic compatibility (EMC), Electromagnetic modelling, Signal integrity (SI), Transmission line matrix modelling (TLM), S-parameter, Macromodel, Input output buffer Information specification (IBIS), PCB trace configurations, Crosstalk
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800 Electronics
Faculties/Schools: UK Campuses > Faculty of Engineering
UK Campuses > Faculty of Engineering > Department of Electrical and Electronic Engineering
Item ID: 14294
Depositing User: EP, Services
Date Deposited: 05 Nov 2014 10:47
Last Modified: 15 Dec 2017 20:03
URI: https://eprints.nottingham.ac.uk/id/eprint/14294

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