Characterisation and modeling of Gallium nitride power semiconductor devices dynamic on-state resistance

Li, Ke, Evans, Paul and Johnson, Christopher Mark (2018) Characterisation and modeling of Gallium nitride power semiconductor devices dynamic on-state resistance. IEEE Transactions on Power Electronics, 33 (6). pp. 5262-5273. ISSN 0885-8993

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Abstract

Gallium nitride high-electron-mobility transistors (GaN-HEMTs) suffer from trapping effects that increases device on-state resistance (RDS(on)) above its theoretical value. This increase is a function of the applied dc bias when the device is in its off state, and the time which the device is biased for. Thus, dynamic RDS(on) of different commercial GaN-HEMTs are characterised at different bias voltages in the paper by a proposed new measurement circuit. The time-constants associated with trapping and detrapping effects in the device are extracted using the proposed circuit and it is shown that variations in RDS(on) can be predicted using a series of RC circuit networks. A new methodology for integrating these RDS(on) predictions into existing gallium nitride-high-electron-mobility transistors models in standard SPICE simulators to improve model accuracy is then presented. Finally, device dynamic RDS(on) values of the model is compared and validated with the measurement when it switches in a power converter with different duty cycles and switching voltages.

Item Type: Article
RIS ID: https://nottingham-repository.worktribe.com/output/961338
Additional Information: ©2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Keywords: Dynamic on-state resistance, equivalent circuit, gallium nitride high-electron-mobility transistors (GaN-HEMT), power semiconductor device characterisation, power semiconductor device modeling.
Schools/Departments: University of Nottingham, UK > Faculty of Engineering > Department of Electrical and Electronic Engineering
Identification Number: https://doi.org/10.1109/TPEL.2017.2730260
Depositing User: Burns, Rebecca
Date Deposited: 21 Mar 2018 14:43
Last Modified: 04 May 2020 19:50
URI: https://eprints.nottingham.ac.uk/id/eprint/50572

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