Device loss model of a fully SiC based dual active bridge considering the effect of synchronous rectification and deadtime

Wang, Zhenyu and Castellazzi, Alberto (2018) Device loss model of a fully SiC based dual active bridge considering the effect of synchronous rectification and deadtime. In: 2017 IEEE Southern Power Electronics Conference (SPEC), 4-7 December 2017, Puerto Varas, Chile.

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Abstract

It is becoming a great interest to employ SiC based power devices in dual active bridge (DAB) converter as an alternative to conventional Si-IGBT, due to its higher switching frequency potential, smaller switching losses as well as the capability to operate at synchronous rectification (SR) condition. This paper introduces the device loss model of a SiC MOSFET power module based DAB converter considering the effect of synchronous rectification, and the dead-time effect is also discussed. The calculated device loss for both SiC-MOSFET and Si-IGBT are discussed. The results show that the overall device loss is reduced by 40%, where the conduction loss is reduced by 38% because of SR capability of SiC-MOSFET, and the switching loss is reduced by 48% due to the faster transient of SiC-MOSFET during dead-time. On the other hand, the device losses are not even between the primary bridge and the secondary bridge of the DAB converter, and it is more significant for SiC-MOSFET based DAB due to the effect of SR with a maximum of 20%. At last, the dead-time range is given based on the device properties.

Item Type: Conference or Workshop Item (Paper)
Additional Information: © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. Published in: Proceedings of 2017 IEEE Southern Power Electronics Conference (SPEC), 4-7 December 2017, Puerto Varas, Chile, doi:10.1109/spec.2017.8333662
Schools/Departments: University of Nottingham, UK > Faculty of Engineering > Department of Electrical and Electronic Engineering
Identification Number: https://doi.org/10.1109/spec.2017.8333662
Depositing User: Eprints, Support
Date Deposited: 06 Sep 2018 10:03
Last Modified: 06 Sep 2018 10:03
URI: http://eprints.nottingham.ac.uk/id/eprint/53767

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