Using multi time-scale electro-thermal simulation approach to evaluate SiC-MOSFET power C=converter in virtual prototyping design tool

Li, Ke and Evans, Paul and Johnson, Christopher Mark (2017) Using multi time-scale electro-thermal simulation approach to evaluate SiC-MOSFET power C=converter in virtual prototyping design tool. In: IEEE COMPEL 2017, 9-12 Jul 2017, Stanford, California, USA.

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Abstract

Using virtual prototyping (VP) design tool to eval¬uate power converter electro-thermal performance can help designers to validate prototype in a quick way. However, different system time-scale requires efficient electro-thermal simulation techniques. Thus, an approach by using average power losses of one switching cycle is presented in the paper to decouple electrical and thermal simulation so as to evaluate the influence of the parasitic inductance on device junction temperature quickly. This approach is validated by comparing with a method to obtain device junction temperature by using instantaneous power losses. By implementing it in the VP design tool, where a SiC-MOSFET behavioural model is developed and validated, it is shown the parasitic inductance influence on power converter electro-thermal waveforms. Thus, designers can evaluate power converter electro-thermal performance more quickly than other commercial software.

Item Type: Conference or Workshop Item (Paper)
Additional Information: Published in: 2017 IEEE 18th Workshop on Control and Modeling for Power Electronics (COMPEL), IEEE, 2017, ISBN 9781509053261, doi: 10.1109/COMPEL.2017.8013278
Keywords: Virtual prototyping; Multi time-scale; Electro-thermal simulation; SiC-MOSFET; Parasitic inductance; Switching losses
Schools/Departments: University of Nottingham, UK > Faculty of Engineering > Department of Electrical and Electronic Engineering
Related URLs:
Depositing User: Burns, Rebecca
Date Deposited: 22 Sep 2017 10:24
Last Modified: 14 Oct 2017 08:48
URI: http://eprints.nottingham.ac.uk/id/eprint/46563

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