Low inductance 2.5kV packaging technology for SiC switchesTools Mouawad, Bassem, Li, Jianfeng, Castellazzi, Alberto, Johnson, Christopher Mark, Erlbacher, Tobias and Friedriches, Peter (2016) Low inductance 2.5kV packaging technology for SiC switches. In: 9th International Conference on Integrated Power Electronics Systems, 08-10 Mar 2016, Nuremberg, Germany. Full text not available from this repository.AbstractThe switching speed of power semiconductors has reached levels where conventional semiconductors packages limit the achievable performance due to relatively high parasitic inductance and capacitance. This paper presents a novel packaging structure which employs stacked substrate and flexible printed circuit board (PCB) to obtain very low parasitic inductance and hence feature high switching speed SiC power devices. A half-bridge module aimed at blocking voltage up to 2.5kV has been designed to ac¬commodate 8 SiC JFETs and 4 SiC diodes. Electromagnetic simulation results reveal extremely low in¬ductance values of the major loops. Due to delay delivery of those custom ordered substrate and PCB, the prototyping samples of the designed module have yet been constructed. The up to date results including experimental construction, electrical and thermal performance of the samples will be presented at the conference.
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